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| INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: * The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC * The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF40098B buffers 3-state hex inverting buffer Product specification File under Integrated Circuits, IC04 January 1995 Philips Semiconductors Product specification 3-state hex inverting buffer DESCRIPTION The HEF40098B is a hex inverting buffer with 3-state outputs. The 3-state outputs are controlled by two enable inputs (EO4 and EO2). A HIGH on EO4 causes four of the six buffer elements to assume a high impedance or OFF-state regardless of the other input conditions and a HIGH on EO2 causes the outputs of the remaining two buffer elements to assume a high impedance or OFF-state regardless of the other input conditions. HEF40098B buffers Fig.2 Pinning diagram. HEF40098BP(N): HEF40098BD(F): HEF40098BT(D): 16-lead DIL; plastic (SOT38-1) 16-lead DIL; ceramic (cerdip) (SOT74) 16-lead SO; plastic (SOT109-1) ( ): Package Designator North America PINNING I1 to I6 EO4, EO2 O1 to O6 Fig.1 Functional diagram. buffer inputs enable inputs (active LOW) buffer outputs (active LOW) FAMILY DATA, IDD LIMITS category BUFFERS See Family Specifications January 1995 2 Philips Semiconductors Product specification 3-state hex inverting buffer HEF40098B buffers Fig.3 Logic diagram. DC CHARACTERISTICS VSS = 0 V Tamb (C) HEF VDD V 5 10 15 HIGH Output current LOW 5 4,75 10 15 VOH V 4,6 9,5 13,5 2,5 0,4 0,5 IOL 1,5 -IOH -IOH VOL V SYMBOL -40 MIN. Output current HIGH 1,2 3,8 12,0 3,8 3,5 12,0 24,0 MAX. +25 MIN. 1,0 3,2 10,0 3,2 2,9 10,0 20,0 MAX. +85 MIN. 0,8 2,5 8,0 2,5 2,3 8,0 16,0 MAX. mA mA mA mA mA mA mA Tamb (C) HEC VDD V 5 10 15 HIGH Output current LOW 5 4,75 10 15 VOH V 4,6 9,5 12,5 2,5 0,4 0,5 IOL 1,5 -IOH -IOH VOL V SYMBOL -55 MIN. Output current HIGH 1,25 4,0 12,5 4,0 3,6 12,5 25,0 MAX. +25 MIN. 1,0 3,2 10,0 3,2 2,9 10,0 20,0 MAX. +125 MIN. 0,6 2,1 6,7 2,1 1,9 6,7 13,0 MAX. mA mA mA mA mA mA mA January 1995 3 Philips Semiconductors Product specification 3-state hex inverting buffer AC CHARACTERISTICS VSS = 0 V; Tamb = 25 C; CL = 50 pF; input transition times 20 ns VDD V Propagation delays In On HIGH to LOW 5 10 15 5 LOW to HIGH Output transition times HIGH to LOW 10 15 5 10 15 5 LOW to HIGH 3-state propagation delays Output disable times EO2, EO4 On HIGH 5 10 15 5 LOW Output enable times EO2, EO4 On HIGH 5 10 15 5 LOW 10 15 tPZL tPZH 70 35 30 90 40 35 140 75 65 185 85 70 ns ns ns ns ns ns 10 15 tPLZ tPHZ 45 35 30 65 40 35 85 65 60 135 80 70 ns ns ns ns ns ns 10 15 tTLH tTHL tPLH tPHL 80 35 25 65 30 25 30 15 10 35 20 15 160 70 50 130 60 50 60 30 20 70 40 30 ns ns ns ns ns ns ns ns ns ns ns ns SYMBOL TYP. MAX. HEF40098B buffers TYPICAL EXTRAPOLATION FORMULA 70 ns + (0,20 ns/pF) CL 31 ns + (0,08 ns/pF) CL 22 ns + (0,06 ns/pF) CL 50 ns + (0,30 ns/pF) CL 24 ns + (0,13 ns/pF) CL 23 ns + (0,05 ns/pF) CL 15 ns + (0,30 ns/pF) CL 10 ns + (0,11 ns/pF) CL 7 ns + (0,07 ns/pF) CL 10 ns + (0,50 ns/pF) CL 8 ns + (0,24 ns/pF) CL 6 ns + (0,18 ns/pF) CL VDD V Dynamic power dissipation per package (P) 5 10 15 TYPICAL FORMULA FOR P (W) 5 000 fi + (foCL) x VDD2 22 800 fi + (foCL) x 81 000 fi + (foCL) x VDD2 VDD2 where fi = input freq. (MHz) fo = output freq. (MHz) CL = load cap. (pF) (foCL) = sum of outputs VDD = supply voltage (V) January 1995 4 |
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